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* pdm: Use latest cic3_pdm from peripheralHEADmasterJon Nordby2025-08-12
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* pdm: Ensure output buffer is large enoughJon Nordby2025-08-12
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* pdm: Fix error handling around PDM to PCM with verilatorJon Nordby2025-08-12
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* pdm: Copy latest cic3_pdm from peripheralJon Nordby2025-08-12
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* pdm: Make sure to reset before startingJon Nordby2025-08-12
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* pdm: Correct test for 3 stage CIC (no DC reject)Jon Nordby2025-08-12
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* Revert back to 3 stage CIC filterJon Nordby2025-08-12
| | | | From 2843105739db84851c3e9d2436c2c3c2c0563abf
* pdm: Support first-order sigma delta generation alsoJon Nordby2025-08-09
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* pdm: Using 255 seems pretty niceJon Nordby2025-08-09
| | | | Lower values have much larger DC offsets on output
* pdm: Try to use shifts instead of mulJon Nordby2025-08-08
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* pdm: Try to bring back alpha setting for DC removalJon Nordby2025-08-08
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* pdm: Attempt at more efficient DC rejecterJon Nordby2025-08-08
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* pdm: Leaky integrator for DC blocking seems betterJon Nordby2025-08-08
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* pdm: Support optional markers in plotJon Nordby2025-08-08
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* pdm: Try switch to 2 stage CICJon Nordby2025-08-08
| | | | Still seeing odd spikes on output
* pdm: Try more HPF fixesJon Nordby2025-08-08
| | | | Still not right. Seeing periodic steps on output, that settle to 0, repeatedly
* pdm: Try add high pass filter for DC blocking/removalJon Nordby2025-08-08
| | | | Does not work right...
* pdm: Make the sinewave test actually assert relevant valuesJon Nordby2025-08-08
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* pdm: Fix python path for testsJon Nordby2025-08-08
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* README: Notes on TinytapeoutJon Nordby2025-07-20
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* filter: transmit 16000 Hz signed 8 bit PCM over UARTMartin Stensgård2025-07-16
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* move top -> recordMartin Stensgård2025-07-16
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* Makefile: add gui by nextpnrMartin Stensgård2025-07-16
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* bindings: clang-formatMartin Stensgård2025-05-14
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* bindings/README: add python dependenciesMartin Stensgård2025-05-14
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* Track runtime of PDM conversionJon Nordby2025-05-14
| | | | Seems to be around 10x realtime for 1+ seconds
* cic3_pdm: Silence a warning from VerilatorJon Nordby2025-05-14
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* bindings: Improve test for PDM to PCMJon Nordby2025-05-14
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* bindings: Actually build cic3_pdm codeJon Nordby2025-05-14
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* bindings: Add a unified MakefileJon Nordby2025-05-14
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* LICENSE: ISCMartin Stensgård2025-05-02
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* bindings/README: give debian command for installing python dependenciesMartin Stensgård2025-05-02
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* bindings: Use verilator_lib in PythonJon Nordby2025-05-02
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* bindings: Example of using pybind11 with numpyJon Nordby2025-05-02
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* Remove unused pdm_outJon Nordby2025-05-02
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* cocotb: Have two tests, share coreJon Nordby2025-05-02
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* cocotb: Specify some argumentsJon Nordby2025-05-02
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* cocotb: Test and fix 1khz sineJon Nordby2025-05-02
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* verilator_lib: wrap verilog module in c++ library in c++ executableMartin Stensgård2025-05-02
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* verilator_mul: multiply 32 bit integers, 38 MHz on puMartin Stensgård2025-05-02
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* verilator_add: benchmark 8-bit addition: 37 MHz on puMartin Stensgård2025-05-02
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* verilator_example_tracing/.gitignore: +/dump.vcdMartin Stensgård2025-04-27
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* verilator_example_tracing: dump value changeMartin Stensgård2025-04-27
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* cocotb: Run multiple PCM samplesJon Nordby2025-04-26
| | | | 1000 samples is quite slow, takes many seconds
* cocotb: Try to test a CIC filterJon Nordby2025-04-26
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* cocotb: Switch to plain Verilog, from SystemVerilogJon Nordby2025-04-26
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* cocotb: Try to run quickstartJon Nordby2025-04-26
| | | | Passes both using SIM=verilator and SIM=icarus
* pdm2pcm: Default to 4 stagesJon Nordby2025-04-26
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* pdm2pcm: CIC filter that worksJon Nordby2025-04-26
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* pdm2pcm: Try add support for CICJon Nordby2025-04-26
| | | | | Currently not really working FIR with 501 taps is considerably better than 101 though
generated by cgit v1.2.3 (git 2.25.1) at 2025-09-18 18:49:38 +0000