pdm: Try more HPF fixes

Still not right. Seeing periodic steps on output, that settle to 0, repeatedly

1 files changed, 30 insertions, 22 deletions

diff --git a/cocotb_try/cic3_pdm.v b/cocotb_try/cic3_pdm.v
index e641ba1..fc5de46 100644
--- a/cocotb_try/cic3_pdm.v
+++ b/cocotb_try/cic3_pdm.v
@@ -10,26 +10,28 @@ module cic3_pdm (
 
 );
     //parameter DECIMATION = 64; // Decimation factor
-    parameter OUTPUT_SHIFT = 8; // Can tune this
+    parameter OUTPUT_SHIFT = 10; // Can tune this
 
     // Internal registers
-    reg signed [31:0] integrator_0 = 0;
-    reg signed [31:0] integrator_1 = 0;
-    reg signed [31:0] integrator_2 = 0;
+    reg signed [38:0] integrator_0 = 0;
+    reg signed [38:0] integrator_1 = 0;
+    reg signed [38:0] integrator_2 = 0;
 
     reg [5:0] decim_counter = 0;
-    reg signed [31:0] comb_0 = 0, comb_1 = 0;
+    reg signed [38:0] comb_0 = 0, comb_1 = 0;
 
     /* verilator lint_off UNUSEDSIGNAL */
-    reg signed [31:0] comb_2 = 0;
+    reg signed [38:0] comb_2 = 0;
 
     // HPF registers
     reg signed [15:0] hpf_prev = 0;     // Previous input sample
+    reg signed [15:0] cic_reg = 0;      // Registered CIC output
+    reg cic_valid = 0;
 
     // CIC output
     wire signed [15:0] cic_out = comb_2[OUTPUT_SHIFT + 15 : OUTPUT_SHIFT];
 
-    reg signed [31:0] delay_0 = 0, delay_1 = 0, delay_2 = 0;
+    reg signed [38:0] delay_0 = 0, delay_1 = 0, delay_2 = 0;
 
     reg signed [15:0] pcm_out_r = 0;
     reg pcm_valid_r = 0;
@@ -55,33 +57,39 @@ module cic3_pdm (
             decim_counter <= decim_counter + 1;
     end
 
-    // Comb + HPF stage (runs every DECIMATION clocks)
+    // Comb stage
     always @(posedge clk) begin
-        pcm_valid_r <= 0;
-
+        cic_valid <= 0;
         if (rst) begin
-            hpf_prev <= 0;
-            pcm_out_r <= 0;
+            cic_reg <= 0;
         end else if (decim_counter == 63) begin
-
             comb_0 <= integrator_2 - delay_0;
             delay_0 <= integrator_2;
-
             comb_1 <= comb_0 - delay_1;
             delay_1 <= comb_0;
-
             comb_2 <= comb_1 - delay_2;
             delay_2 <= comb_1;
-
-            // Simple DC blocking HPF: y[n] = x[n] - x[n-1] + alpha*y[n-1]
+        end else if (decim_counter == 0) begin
+            // CIC output is now stable, register it
+            cic_reg <= cic_out;
+            cic_valid <= 1;
+        end
+    end
+    
+    // HPF stage (runs after CIC settles)
+    always @(posedge clk) begin
+        pcm_valid_r <= 0;
+        if (rst) begin
+            hpf_prev <= 0;
+            pcm_out_r <= 0;
+        end else if (cic_valid) begin
             if (hpf_alpha == 8'd255) begin
-                pcm_out_r <= cic_out;
+                pcm_out_r <= cic_reg;
             end else begin
-                // HPF equation rearranged for better stability
-                pcm_out_r <= cic_out - hpf_prev + ((pcm_out_r * hpf_alpha) >>> 8);
+                // HPF: y[n] = x[n] - x[n-1] + alpha*y[n-1]
+                pcm_out_r <= cic_reg - hpf_prev + ((pcm_out_r * hpf_alpha) >>> 8);
             end
-            hpf_prev <= cic_out;
-
+            hpf_prev <= cic_reg;
             pcm_valid_r <= 1;
         end
     end