verilator_lib: wrap verilog module in c++ library in c++ executable

1 files changed, 36 insertions, 0 deletions

diff --git a/verilator_lib/sim.cc b/verilator_lib/sim.cc
new file mode 100644
index 0000000..3ca8f67
--- /dev/null
+++ b/verilator_lib/sim.cc
@@ -0,0 +1,36 @@
+#include <cstdint>
+#include <cstdio>
+
+#include "Vmul.h"
+#include "verilated.h"
+
+enum { MAX = 10000 };
+
+int
+sim(void)
+{
+	VerilatedContext *cp = new VerilatedContext;
+
+	Vmul *top = new Vmul{cp};
+	top->clk = 0;
+
+	int numclks = 0;
+	for (int x = 0; x < MAX; ++x) {
+		for (int y = 0; y < MAX; ++y) {
+			top->x = x;
+			top->y = y;
+			top->clk = 1;
+			top->eval();
+
+			int p = top->p;
+			if (p != (uint32_t)(x * y))
+				printf("%4d * %4d = %4d\n", x, y, p);
+
+			top->clk = 0;
+			top->eval();
+			++numclks;
+		}
+	}
+	fprintf(stderr, "%d clock cycles\n", numclks);
+	return 0;
+}