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| author | Jon Nordby <jononor@gmail.com> | 2025-04-26 18:09:02 +0200 |
|---|---|---|
| committer | Jon Nordby <jononor@gmail.com> | 2025-04-26 21:33:29 +0200 |
| commit | b2b664b2596b48048ba97c5b43f3f29345c6bdb3 (patch) | |
| tree | 55c85518cc8d920546e081fa9e4a6f6c3ada6909 /cocotb_try/test_my_design.py | |
| parent | ea5c8903b101708b49c2789ebc7d6e5f9453f119 (diff) | |
cocotb: Switch to plain Verilog, from SystemVerilog
Diffstat (limited to 'cocotb_try/test_my_design.py')
0 files changed, 0 insertions, 0 deletions