summaryrefslogtreecommitdiff
path: root/README
blob: 05f63463f2c78d2aac80d835e50bd4ca29b000e5 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
Gate Array Learn

	apt install yosys fpga-icestorm nextpnr-ice40 verilator flashrom
	make
	doas make load

Raspberry Pi UART
	Enable serial communication in raspi-config.

UART
	stty -F /dev/ttyUSB1 3000000 raw cs8
	hexdump -ve '1/1 "%u\n"' /dev/ttyUSB1 | pv > pcm.txt

	pv /dev/ttyUSB1 > pcm.raw
	hexdump -ve '1/1 "%u\n"' pcm.raw > pcm.txt
	play -r 48k -e unsigned-integer -b 8 -c 1 pcm.raw

References
	Adafruit PDM Microphone Breakout
		https://learn.adafruit.com/adafruit-pdm-microphone-breakout/
	Cascaded Integrator-Comb (CIC) Filters
		https://www.dsprelated.com/showarticle/1337.php
	CIC filter in Verilog
		https://github.com/ericgineer/CIC/blob/master/CIC.v
	Pulse Density Modulation
		https://curiouser.cheshireeng.com/2015/01/21/pdm-in-attiny85-source-code/
		https://en.wikipedia.org/wiki/Pulse-code_modulation
		https://tomverbeure.github.io/2020/10/04/PDM-Microphones-and-Sigma-Delta-Conversion.html
		https://tomverbeure.github.io/2020/12/20/Design-of-a-Multi-Stage-PDM-to-PCM-Decimation-Pipeline.html
	RMS in FPGA
		https://www.controlpaths.com/2022/07/18/true-rms-compute-in-fpga/
	Verilator
		https://www.veripool.org/verilator/
		https://verilator.org/guide/latest/
	Verilog by Example (Blaine C. Raedler 2021)
		http://readler.com/books2.html


TinyTapeout submission

    There are Github Actions that build the design. GDS output most interesting
    https://tinytapeout.com/guides/workshop/create-your-gds/

    https://github.com/jonnor/ttysky25a-pdm-microphone

    tt-sky25a shuttle repo
    https://github.com/TinyTapeout/tinytapeout-sky-25a

    This seems like the correct template for sky25a submissions
    But CI builds failing as of June 20, 2025!
    https://github.com/TinyTapeout/ttsky-verilog-template

    Others have submitted using to sky25a using these older templates
    https://github.com/TinyTapeout/tt09-verilog-template
    https://github.com/TinyTapeout/tt10-verilog-template

    Examples
    https://github.com/urish/tt09-giant-ring-oscillator
    https://github.com/RVCE-ECE-Shylashree/TT10_LogAFPM-16