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| author | Martin Stensgård <mastensg@mastensg.net> | 2025-05-02 19:55:31 +0200 |
|---|---|---|
| committer | Martin Stensgård <mastensg@mastensg.net> | 2025-05-02 19:55:31 +0200 |
| commit | f38b4c8370f293ddb19f623e3112cf28bc0088b6 (patch) | |
| tree | 7a75d7cb4d061c636a1cd1e4eaaea9919c78a358 /verilator_add/Makefile | |
| parent | 4472067cda484a5abad18ace2696689fdd718956 (diff) | |
verilator_add: benchmark 8-bit addition: 37 MHz on pu
Diffstat (limited to 'verilator_add/Makefile')
| -rw-r--r-- | verilator_add/Makefile | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/verilator_add/Makefile b/verilator_add/Makefile new file mode 100644 index 0000000..86cdb8c --- /dev/null +++ b/verilator_add/Makefile @@ -0,0 +1,12 @@ +all: obj_dir/Vadd + +check: all + obj_dir/Vadd + +clean: + rm -fr obj_dir + +.PHONY: all check clean + +obj_dir/Vadd: add.v sim_main.cc + verilator --cc --exe --build -j 0 -Wall sim_main.cc add.v |