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authorMartin Stensgård <mastensg@mastensg.net>2025-04-18 16:29:47 +0200
committerMartin Stensgård <mastensg@mastensg.net>2025-04-18 16:29:47 +0200
commitfc618806726e6c9a3f99567112f6104c121f6cd6 (patch)
tree05efb79265d13fc85982fc744b971c174e8f5273 /README
parent2d4977f2529a59a7c7be78af1d991179a3b59396 (diff)
README: reference p. trujilo's rms in fpga
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@@ -25,5 +25,7 @@ References
https://en.wikipedia.org/wiki/Pulse-code_modulation
https://tomverbeure.github.io/2020/10/04/PDM-Microphones-and-Sigma-Delta-Conversion.html
https://tomverbeure.github.io/2020/12/20/Design-of-a-Multi-Stage-PDM-to-PCM-Decimation-Pipeline.html
+ RMS in FPGA
+ https://www.controlpaths.com/2022/07/18/true-rms-compute-in-fpga/
Verilog by Example (Blaine C. Raedler 2021)
http://readler.com/books2.html