diff options
Diffstat (limited to 'ice4pi.kicad_pcb')
| -rw-r--r-- | ice4pi.kicad_pcb | 3263 |
1 files changed, 1739 insertions, 1524 deletions
diff --git a/ice4pi.kicad_pcb b/ice4pi.kicad_pcb index 690340a..c3d4e7c 100644 --- a/ice4pi.kicad_pcb +++ b/ice4pi.kicad_pcb @@ -3,10 +3,10 @@ (general (thickness 1.6) (drawings 17) - (tracks 922) + (tracks 1136) (zones 0) (modules 66) - (nets 166) + (nets 148) ) (page A4) @@ -159,105 +159,87 @@ (net 64 "Net-(U1-Pad104)") (net 65 "Net-(U1-Pad109)") (net 66 "Net-(U1-Pad110)") - (net 67 "Net-(U1-Pad120)") - (net 68 "Net-(U1-Pad121)") - (net 69 "Net-(U1-Pad122)") - (net 70 "Net-(U1-Pad124)") - (net 71 "Net-(U1-Pad125)") - (net 72 "Net-(U1-Pad126)") - (net 73 "Net-(U1-Pad127)") - (net 74 "Net-(U1-Pad128)") - (net 75 "Net-(U1-Pad129)") - (net 76 "Net-(U1-Pad130)") - (net 77 "Net-(U1-Pad131)") - (net 78 "Net-(U1-Pad134)") - (net 79 "Net-(U1-Pad135)") - (net 80 "Net-(U1-Pad136)") - (net 81 "Net-(U1-Pad137)") - (net 82 "Net-(U1-Pad138)") - (net 83 "Net-(U1-Pad139)") - (net 84 "Net-(U1-Pad141)") - (net 85 "Net-(U1-Pad142)") - (net 86 "Net-(U1-Pad143)") - (net 87 "Net-(U1-Pad144)") - (net 88 12MHz) - (net 89 iCE_CDONE) - (net 90 iCE_CREST) - (net 91 iCE_MOSI) - (net 92 iCE_MISO) - (net 93 iCE_SCK) - (net 94 iCE_SS_B) - (net 95 "Net-(R1-Pad2)") - (net 96 "Net-(R2-Pad2)") - (net 97 +3V3) - (net 98 +5V) - (net 99 "Net-(C5-Pad2)") - (net 100 "Net-(C5-Pad1)") - (net 101 +1V2) - (net 102 "Net-(C26-Pad1)") - (net 103 LED4) - (net 104 "Net-(D1-Pad1)") - (net 105 "Net-(D2-Pad1)") - (net 106 LED3) - (net 107 "Net-(D3-Pad1)") - (net 108 LED2) - (net 109 LED1) - (net 110 "Net-(D4-Pad1)") - (net 111 "Net-(D5-Pad1)") - (net 112 LED0) - (net 113 PIO1_02) - (net 114 PIO1_03) - (net 115 PIO1_04) - (net 116 PIO1_05) - (net 117 PIO1_06) - (net 118 PIO1_07) - (net 119 PIO1_08) - (net 120 PIO1_09) - (net 121 "Net-(J2-Pad7)") - (net 122 "Net-(J2-Pad11)") - (net 123 "Net-(J2-Pad12)") - (net 124 "Net-(J2-Pad13)") - (net 125 "Net-(J2-Pad26)") - (net 126 "Net-(J2-Pad27)") - (net 127 "Net-(J2-Pad28)") - (net 128 "Net-(J2-Pad29)") - (net 129 "Net-(J2-Pad31)") - (net 130 "Net-(J2-Pad32)") - (net 131 "Net-(J2-Pad33)") - (net 132 "Net-(J2-Pad35)") - (net 133 "Net-(J2-Pad36)") - (net 134 "Net-(J2-Pad37)") - (net 135 "Net-(J2-Pad38)") - (net 136 "Net-(J2-Pad40)") - (net 137 "Net-(R16-Pad2)") - (net 138 PIO0_09) - (net 139 PIO0_08) - (net 140 PIO0_07) - (net 141 PIO0_06) - (net 142 PIO0_05) - (net 143 PIO0_04) - (net 144 PIO0_03) - (net 145 PIO0_02) - (net 146 "Net-(D6-Pad1)") - (net 147 RS232_Tx_TTL) - (net 148 RS232_Rx_TTL) - (net 149 IR_SD) - (net 150 IR_RXD) - (net 151 IR_TXD) - (net 152 "Net-(R21-Pad1)") - (net 153 "Net-(U5-Pad2)") - (net 154 "Net-(C32-Pad1)") - (net 155 "Net-(U5-Pad7)") - (net 156 "Net-(C31-Pad2)") - (net 157 "Net-(U3-Pad1)") - (net 158 "Net-(U3-Pad2)") - (net 159 "Net-(U3-Pad3)") - (net 160 "Net-(U3-Pad4)") - (net 161 "Net-(U3-Pad17)") - (net 162 "Net-(U3-Pad18)") - (net 163 "Net-(U3-Pad19)") - (net 164 "Net-(J2-Pad16)") - (net 165 "Net-(J2-Pad15)") + (net 67 "Net-(U1-Pad124)") + (net 68 "Net-(U1-Pad125)") + (net 69 "Net-(U1-Pad126)") + (net 70 "Net-(U1-Pad127)") + (net 71 "Net-(U1-Pad130)") + (net 72 "Net-(U1-Pad131)") + (net 73 12MHz) + (net 74 iCE_CDONE) + (net 75 iCE_CREST) + (net 76 iCE_MOSI) + (net 77 iCE_MISO) + (net 78 iCE_SCK) + (net 79 iCE_SS_B) + (net 80 "Net-(R1-Pad2)") + (net 81 "Net-(R2-Pad2)") + (net 82 +3V3) + (net 83 +5V) + (net 84 "Net-(C5-Pad2)") + (net 85 "Net-(C5-Pad1)") + (net 86 +1V2) + (net 87 "Net-(C26-Pad1)") + (net 88 LED4) + (net 89 "Net-(D1-Pad1)") + (net 90 "Net-(D2-Pad1)") + (net 91 LED3) + (net 92 "Net-(D3-Pad1)") + (net 93 LED2) + (net 94 LED1) + (net 95 "Net-(D4-Pad1)") + (net 96 "Net-(D5-Pad1)") + (net 97 LED0) + (net 98 PIO1_02) + (net 99 PIO1_03) + (net 100 PIO1_04) + (net 101 PIO1_05) + (net 102 PIO1_06) + (net 103 PIO1_07) + (net 104 PIO1_08) + (net 105 PIO1_09) + (net 106 "Net-(R16-Pad2)") + (net 107 PIO0_09) + (net 108 PIO0_08) + (net 109 PIO0_07) + (net 110 PIO0_06) + (net 111 PIO0_05) + (net 112 PIO0_04) + (net 113 PIO0_03) + (net 114 PIO0_02) + (net 115 "Net-(D6-Pad1)") + (net 116 RS232_Tx_TTL) + (net 117 RS232_Rx_TTL) + (net 118 IR_SD) + (net 119 IR_RXD) + (net 120 IR_TXD) + (net 121 "Net-(R21-Pad1)") + (net 122 "Net-(U5-Pad2)") + (net 123 "Net-(C32-Pad1)") + (net 124 "Net-(U5-Pad7)") + (net 125 "Net-(C31-Pad2)") + (net 126 "Net-(U3-Pad1)") + (net 127 "Net-(U3-Pad2)") + (net 128 "Net-(U3-Pad3)") + (net 129 "Net-(U3-Pad4)") + (net 130 "Net-(U3-Pad17)") + (net 131 "Net-(U3-Pad18)") + (net 132 "Net-(U3-Pad19)") + (net 133 PIO0_10) + (net 134 PIO0_12) + (net 135 PIO0_11) + (net 136 PIO0_13) + (net 137 PIO0_14) + (net 138 PIO0_15) + (net 139 PIO0_16) + (net 140 PIO0_21) + (net 141 PIO0_20) + (net 142 PIO0_19) + (net 143 PIO0_18) + (net 144 PIO0_17) + (net 145 "Net-(U1-Pad144)") + (net 146 "Net-(U1-Pad143)") + (net 147 "Net-(U1-Pad142)") (net_class Default "This is the default net class." (clearance 0.2) @@ -290,24 +272,6 @@ (add_net "Net-(D4-Pad1)") (add_net "Net-(D5-Pad1)") (add_net "Net-(D6-Pad1)") - (add_net "Net-(J2-Pad11)") - (add_net "Net-(J2-Pad12)") - (add_net "Net-(J2-Pad13)") - (add_net "Net-(J2-Pad15)") - (add_net "Net-(J2-Pad16)") - (add_net "Net-(J2-Pad26)") - (add_net "Net-(J2-Pad27)") - (add_net "Net-(J2-Pad28)") - (add_net "Net-(J2-Pad29)") - (add_net "Net-(J2-Pad31)") - (add_net "Net-(J2-Pad32)") - (add_net "Net-(J2-Pad33)") - (add_net "Net-(J2-Pad35)") - (add_net "Net-(J2-Pad36)") - (add_net "Net-(J2-Pad37)") - (add_net "Net-(J2-Pad38)") - (add_net "Net-(J2-Pad40)") - (add_net "Net-(J2-Pad7)") (add_net "Net-(R1-Pad2)") (add_net "Net-(R16-Pad2)") (add_net "Net-(R2-Pad2)") @@ -321,24 +285,12 @@ (add_net "Net-(U1-Pad11)") (add_net "Net-(U1-Pad110)") (add_net "Net-(U1-Pad12)") - (add_net "Net-(U1-Pad120)") - (add_net "Net-(U1-Pad121)") - (add_net "Net-(U1-Pad122)") (add_net "Net-(U1-Pad124)") (add_net "Net-(U1-Pad125)") (add_net "Net-(U1-Pad126)") (add_net "Net-(U1-Pad127)") - (add_net "Net-(U1-Pad128)") - (add_net "Net-(U1-Pad129)") (add_net "Net-(U1-Pad130)") (add_net "Net-(U1-Pad131)") - (add_net "Net-(U1-Pad134)") - (add_net "Net-(U1-Pad135)") - (add_net "Net-(U1-Pad136)") - (add_net "Net-(U1-Pad137)") - (add_net "Net-(U1-Pad138)") - (add_net "Net-(U1-Pad139)") - (add_net "Net-(U1-Pad141)") (add_net "Net-(U1-Pad142)") (add_net "Net-(U1-Pad143)") (add_net "Net-(U1-Pad144)") @@ -415,6 +367,18 @@ (add_net PIO0_07) (add_net PIO0_08) (add_net PIO0_09) + (add_net PIO0_10) + (add_net PIO0_11) + (add_net PIO0_12) + (add_net PIO0_13) + (add_net PIO0_14) + (add_net PIO0_15) + (add_net PIO0_16) + (add_net PIO0_17) + (add_net PIO0_18) + (add_net PIO0_19) + (add_net PIO0_20) + (add_net PIO0_21) (add_net PIO1_02) (add_net PIO1_03) (add_net PIO1_04) @@ -442,6 +406,152 @@ (uvia_drill 0.1) ) + (module ice4pi:lsi-logo-16mm (layer F.Cu) (tedit 60138257) (tstamp 5E3781CF) + (at 99.3 75.55) + (descr "Imported from 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-0.235329) (xy 0.098961 -0.235329) (xy 0.098961 -0.309226) + (xy -0.090563 -0.309226) (xy -0.090563 -0.814105) (xy -0.334992 -0.814105)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy 2.830577 -0.813072) (xy 2.830577 -0.454437) (xy 2.874114 -0.278221) (xy 3.007052 -0.220343) + (xy 3.109242 -0.246181) (xy 3.178746 -0.322145) (xy 3.178746 -0.235329) (xy 3.274865 -0.235329) + (xy 3.274865 -0.813072) (xy 3.178746 -0.813072) (xy 3.178746 -0.48596) (xy 3.142961 -0.350051) + (xy 3.039737 -0.303025) (xy 2.953567 -0.339715) (xy 2.926049 -0.454437) (xy 2.926049 -0.813072) + (xy 2.830577 -0.813072)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -1.09554 -0.360257) (xy -1.09554 -0.110272) (xy -0.844522 -0.110272) (xy -0.844522 -0.360257) + (xy -1.09554 -0.360257)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy 6.963744 -1.142542) (xy 6.929034 -1.037612) (xy 6.822897 -0.71568) (xy 6.795735 -0.633187) + (xy 6.747043 -0.484796) (xy 6.746218 -0.481877) (xy 6.784449 -0.481047) (xy 6.822476 -0.47938) + (xy 6.706279 -0.052518) (xy 6.685052 0.025953) (xy 6.671472 0.075953) (xy 6.671772 0.077203) + (xy 6.685757 0.045698) (xy 6.715838 -0.024927) (xy 6.748435 -0.101385) (xy 6.780628 -0.176839) + (xy 6.8259 -0.282973) (xy 6.871071 -0.388912) (xy 6.903464 -0.464866) (xy 6.927509 -0.521204) + (xy 6.935356 -0.539499) (xy 6.891191 -0.539499) (xy 6.847026 -0.539916) (xy 6.849651 -0.553294) + (xy 6.862124 -0.615266) (xy 6.881239 -0.709832) (xy 6.899344 -0.799372) (xy 6.926506 -0.933677) + (xy 6.953669 -1.067983) (xy 6.968659 -1.142328) (xy 6.974394 -1.172792) (xy 6.963729 -1.142203) + (xy 6.963744 -1.142542)) (layer F.SilkS) (width 0.000106)) + (fp_poly (pts (xy -5.647988 -0.754037) (xy -5.754829 -0.698226) (xy -5.791649 -0.535962) (xy -5.754829 -0.372665) + (xy -5.646955 -0.316854) (xy -5.546186 -0.373182) (xy -5.510917 -0.535962) (xy -5.546186 -0.698226) + (xy -5.647988 -0.754037)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -2.454902 -0.758688) (xy -2.559288 -0.70236) (xy -2.594557 -0.535446) (xy -2.559288 -0.368531) + (xy -2.454902 -0.312203) (xy -2.350128 -0.369047) (xy -2.313696 -0.535446) (xy -2.350128 -0.701844) + (xy -2.454902 -0.758688)) (layer F.SilkS) (width 0)) + (fp_poly (pts (xy -1.756488 -0.765085) (xy -1.870047 -0.71961) (xy -1.923015 -0.59352) (xy -1.608564 -0.594035) + (xy -1.648484 -0.72116) (xy -1.756488 -0.765084) (xy -1.756488 -0.765085)) (layer F.SilkS) (width 0)) + ) + (module ice4pi:PinSocket_2x20_P2.54mm_Vertical_1_04mm (layer B.Cu) (tedit 5A19A433) (tstamp 5E377842) (at 58.4 53.8 270) (descr "Through hole straight socket strip, 2x20, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated") @@ -474,85 +584,85 @@ (fp_line (start 0.27 1.27) (end 1.27 0.27) (layer B.Fab) (width 0.1)) (fp_line (start -3.81 1.27) (end 0.27 1.27) (layer B.Fab) (width 0.1)) (pad 40 thru_hole oval (at -2.54 -48.26 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 136 "Net-(J2-Pad40)")) + (net 114 PIO0_02)) (pad 39 thru_hole oval (at 0 -48.26 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) (net 5 GND)) (pad 38 thru_hole oval (at -2.54 -45.72 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 135 "Net-(J2-Pad38)")) + (net 112 PIO0_04)) (pad 37 thru_hole oval (at 0 -45.72 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 134 "Net-(J2-Pad37)")) + (net 113 PIO0_03)) (pad 36 thru_hole oval (at -2.54 -43.18 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 133 "Net-(J2-Pad36)")) + (net 110 PIO0_06)) (pad 35 thru_hole oval (at 0 -43.18 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 132 "Net-(J2-Pad35)")) + (net 111 PIO0_05)) (pad 34 thru_hole oval (at -2.54 -40.64 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) (net 5 GND)) (pad 33 thru_hole oval (at 0 -40.64 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 131 "Net-(J2-Pad33)")) + (net 109 PIO0_07)) (pad 32 thru_hole oval (at -2.54 -38.1 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 130 "Net-(J2-Pad32)")) + (net 107 PIO0_09)) (pad 31 thru_hole oval (at 0 -38.1 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 129 "Net-(J2-Pad31)")) + (net 108 PIO0_08)) (pad 30 thru_hole oval (at -2.54 -35.56 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) (net 5 GND)) (pad 29 thru_hole oval (at 0 -35.56 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 128 "Net-(J2-Pad29)")) + (net 133 PIO0_10)) (pad 28 thru_hole oval (at -2.54 -33.02 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 127 "Net-(J2-Pad28)")) + (net 134 PIO0_12)) (pad 27 thru_hole oval (at 0 -33.02 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 126 "Net-(J2-Pad27)")) + (net 135 PIO0_11)) (pad 26 thru_hole oval (at -2.54 -30.48 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 125 "Net-(J2-Pad26)")) + (net 136 PIO0_13)) (pad 25 thru_hole oval (at 0 -30.48 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) (net 5 GND)) (pad 24 thru_hole oval (at -2.54 -27.94 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 94 iCE_SS_B)) + (net 79 iCE_SS_B)) (pad 23 thru_hole oval (at 0 -27.94 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 93 iCE_SCK)) + (net 78 iCE_SCK)) (pad 22 thru_hole oval (at -2.54 -25.4 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 89 iCE_CDONE)) + (net 74 iCE_CDONE)) (pad 21 thru_hole oval (at 0 -25.4 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 92 iCE_MISO)) + (net 77 iCE_MISO)) (pad 20 thru_hole oval (at -2.54 -22.86 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) (net 5 GND)) (pad 19 thru_hole oval (at 0 -22.86 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 91 iCE_MOSI)) + (net 76 iCE_MOSI)) (pad 18 thru_hole oval (at -2.54 -20.32 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 90 iCE_CREST)) + (net 75 iCE_CREST)) (pad 17 thru_hole oval (at 0 -20.32 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 97 +3V3)) + (net 82 +3V3)) (pad 16 thru_hole oval (at -2.54 -17.78 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 164 "Net-(J2-Pad16)")) + (net 138 PIO0_15)) (pad 15 thru_hole oval (at 0 -17.78 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 165 "Net-(J2-Pad15)")) + (net 137 PIO0_14)) (pad 14 thru_hole oval (at -2.54 -15.24 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) (net 5 GND)) (pad 13 thru_hole oval (at 0 -15.24 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 124 "Net-(J2-Pad13)")) + (net 139 PIO0_16)) (pad 12 thru_hole oval (at -2.54 -12.7 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 123 "Net-(J2-Pad12)")) + (net 144 PIO0_17)) (pad 11 thru_hole oval (at 0 -12.7 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 122 "Net-(J2-Pad11)")) + (net 143 PIO0_18)) (pad 10 thru_hole oval (at -2.54 -10.16 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 147 RS232_Tx_TTL)) + (net 116 RS232_Tx_TTL)) (pad 9 thru_hole oval (at 0 -10.16 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) (net 5 GND)) (pad 8 thru_hole oval (at -2.54 -7.62 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 148 RS232_Rx_TTL)) + (net 117 RS232_Rx_TTL)) (pad 7 thru_hole oval (at 0 -7.62 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 121 "Net-(J2-Pad7)")) + (net 142 PIO0_19)) (pad 6 thru_hole oval (at -2.54 -5.08 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) (net 5 GND)) (pad 5 thru_hole oval (at 0 -5.08 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 144 PIO0_03)) + (net 140 PIO0_21)) (pad 4 thru_hole oval (at -2.54 -2.54 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 98 +5V)) + (net 83 +5V)) (pad 3 thru_hole oval (at 0 -2.54 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 145 PIO0_02)) + (net 141 PIO0_20)) (pad 2 thru_hole oval (at -2.54 0 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 98 +5V)) + (net 83 +5V)) (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1.04) (layers *.Cu *.Mask) - (net 97 +3V3)) + (net 82 +3V3)) (model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_2x20_P2.54mm_Vertical.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -588,21 +698,21 @@ (effects (font (size 1 1) (thickness 0.15))) ) (pad 8 smd rect (at 3.5 0 90) (size 0.6 2.5) (layers F.Cu F.Paste F.Mask) - (net 156 "Net-(C31-Pad2)")) + (net 125 "Net-(C31-Pad2)")) (pad 7 smd rect (at 2.5 0 90) (size 0.6 2.5) (layers F.Cu F.Paste F.Mask) - (net 155 "Net-(U5-Pad7)")) + (net 124 "Net-(U5-Pad7)")) (pad 6 smd rect (at 1.5 0 90) (size 0.6 2.5) (layers F.Cu F.Paste F.Mask) - (net 154 "Net-(C32-Pad1)")) + (net 123 "Net-(C32-Pad1)")) (pad 5 smd rect (at 0.5 0 90) (size 0.6 2.5) (layers F.Cu F.Paste F.Mask) - (net 149 IR_SD)) + (net 118 IR_SD)) (pad 4 smd rect (at -0.5 0 90) (size 0.6 2.5) (layers F.Cu F.Paste F.Mask) - (net 150 IR_RXD)) + (net 119 IR_RXD)) (pad 3 smd rect (at -1.5 0 90) (size 0.6 2.5) (layers F.Cu F.Paste F.Mask) - (net 151 IR_TXD)) + (net 120 IR_TXD)) (pad 2 smd rect (at -2.5 0 90) (size 0.6 2.5) (layers F.Cu F.Paste F.Mask) - (net 153 "Net-(U5-Pad2)")) + (net 122 "Net-(U5-Pad2)")) (pad 1 smd rect (at -3.5 0 90) (size 0.6 2.5) (layers F.Cu F.Paste F.Mask) - (net 152 "Net-(R21-Pad1)")) + (net 121 "Net-(R21-Pad1)")) ) (module ice4pi:PinSocket_2x06_P2.54mm_Vertical_1to6_7to12 (layer F.Cu) (tedit 5E2B2FE1) (tstamp 5E4795E8) @@ -637,29 +747,29 @@ (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 thru_hole rect (at 0 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 113 PIO1_02)) + (net 98 PIO1_02)) (pad 7 thru_hole oval (at 2.54 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 117 PIO1_06)) + (net 102 PIO1_06)) (pad 2 thru_hole oval (at 0 2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 114 PIO1_03)) + (net 99 PIO1_03)) (pad 8 thru_hole oval (at 2.54 2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 118 PIO1_07)) + (net 103 PIO1_07)) (pad 3 thru_hole oval (at 0 5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 115 PIO1_04)) + (net 100 PIO1_04)) (pad 9 thru_hole oval (at 2.54 5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 119 PIO1_08)) + (net 104 PIO1_08)) (pad 4 thru_hole oval (at 0 7.62 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 116 PIO1_05)) + (net 101 PIO1_05)) (pad 10 thru_hole oval (at 2.54 7.62 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 120 PIO1_09)) + (net 105 PIO1_09)) (pad 5 thru_hole oval (at 0 10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 5 GND)) (pad 11 thru_hole oval (at 2.54 10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 5 GND)) (pad 6 thru_hole oval (at 0 12.7 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 97 +3V3)) + (net 82 +3V3)) (pad 12 thru_hole oval (at 2.54 12.7 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 97 +3V3)) + (net 82 +3V3)) (model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_2x06_P2.54mm_Vertical.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -721,85 +831,85 @@ (fp_line (start -10.11 -10.11) (end -10.11 -9.16) (layer F.SilkS) (width 0.12)) (fp_line (start -9.16 -10.11) (end -10.11 -10.11) (layer F.SilkS) (width 0.12)) (pad 144 smd roundrect (at -8.75 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 87 "Net-(U1-Pad144)")) + (net 145 "Net-(U1-Pad144)")) (pad 143 smd roundrect (at -8.25 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 86 "Net-(U1-Pad143)")) + (net 146 "Net-(U1-Pad143)")) (pad 142 smd roundrect (at -7.75 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 85 "Net-(U1-Pad142)")) + (net 147 "Net-(U1-Pad142)")) (pad 141 smd roundrect (at -7.25 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 84 "Net-(U1-Pad141)")) + (net 140 PIO0_21)) (pad 140 smd roundrect (at -6.75 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (pad 139 smd roundrect (at -6.25 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 83 "Net-(U1-Pad139)")) + (net 141 PIO0_20)) (pad 138 smd roundrect (at -5.75 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 82 "Net-(U1-Pad138)")) + (net 142 PIO0_19)) (pad 137 smd roundrect (at -5.25 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 81 "Net-(U1-Pad137)")) + (net 143 PIO0_18)) (pad 136 smd roundrect (at -4.75 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 80 "Net-(U1-Pad136)")) + (net 144 PIO0_17)) (pad 135 smd roundrect (at -4.25 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 79 "Net-(U1-Pad135)")) + (net 139 PIO0_16)) (pad 134 smd roundrect (at -3.75 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 78 "Net-(U1-Pad134)")) + (net 138 PIO0_15)) (pad 133 smd roundrect (at -3.25 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (pad 132 smd roundrect (at -2.75 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (pad 131 smd roundrect (at -2.25 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 77 "Net-(U1-Pad131)")) + (net 72 "Net-(U1-Pad131)")) (pad 130 smd roundrect (at -1.75 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 76 "Net-(U1-Pad130)")) + (net 71 "Net-(U1-Pad130)")) (pad 129 smd roundrect (at -1.25 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 75 "Net-(U1-Pad129)")) + (net 137 PIO0_14)) (pad 128 smd roundrect (at -0.75 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 74 "Net-(U1-Pad128)")) + (net 136 PIO0_13)) (pad 127 smd roundrect (at -0.25 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 73 "Net-(U1-Pad127)")) + (net 70 "Net-(U1-Pad127)")) (pad 126 smd roundrect (at 0.25 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 72 "Net-(U1-Pad126)")) + (net 69 "Net-(U1-Pad126)")) (pad 125 smd roundrect (at 0.75 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 71 "Net-(U1-Pad125)")) + (net 68 "Net-(U1-Pad125)")) (pad 124 smd roundrect (at 1.25 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 70 "Net-(U1-Pad124)")) + (net 67 "Net-(U1-Pad124)")) (pad 123 smd roundrect (at 1.75 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (pad 122 smd roundrect (at 2.25 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 69 "Net-(U1-Pad122)")) + (net 134 PIO0_12)) (pad 121 smd roundrect (at 2.75 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 68 "Net-(U1-Pad121)")) + (net 135 PIO0_11)) (pad 120 smd roundrect (at 3.25 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 67 "Net-(U1-Pad120)")) + (net 133 PIO0_10)) (pad 119 smd roundrect (at 3.75 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 138 PIO0_09)) + (net 107 PIO0_09)) (pad 118 smd roundrect (at 4.25 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 139 PIO0_08)) + (net 108 PIO0_08)) (pad 117 smd roundrect (at 4.75 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 140 PIO0_07)) + (net 109 PIO0_07)) (pad 116 smd roundrect (at 5.25 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 141 PIO0_06)) + (net 110 PIO0_06)) (pad 115 smd roundrect (at 5.75 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 142 PIO0_05)) + (net 111 PIO0_05)) (pad 114 smd roundrect (at 6.25 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 143 PIO0_04)) + (net 112 PIO0_04)) (pad 113 smd roundrect (at 6.75 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 144 PIO0_03)) + (net 113 PIO0_03)) (pad 112 smd roundrect (at 7.25 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 145 PIO0_02)) + (net 114 PIO0_02)) (pad 111 smd roundrect (at 7.75 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 101 +1V2)) + (net 86 +1V2)) (pad 110 smd roundrect (at 8.25 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 66 "Net-(U1-Pad110)")) (pad 109 smd roundrect (at 8.75 -10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 65 "Net-(U1-Pad109)")) (pad 108 smd roundrect (at 10.6625 -8.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 146 "Net-(D6-Pad1)")) + (net 115 "Net-(D6-Pad1)")) (pad 107 smd roundrect (at 10.6625 -8.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 149 IR_SD)) + (net 118 IR_SD)) (pad 106 smd roundrect (at 10.6625 -7.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 150 IR_RXD)) + (net 119 IR_RXD)) (pad 105 smd roundrect (at 10.6625 -7.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 151 IR_TXD)) + (net 120 IR_TXD)) (pad 104 smd roundrect (at 10.6625 -6.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 64 "Net-(U1-Pad104)")) (pad 103 smd roundrect (at 10.6625 -6.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) @@ -809,33 +919,33 @@ (pad 101 smd roundrect (at 10.6625 -5.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 62 "Net-(U1-Pad101)")) (pad 100 smd roundrect (at 10.6625 -4.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (pad 99 smd roundrect (at 10.6625 -4.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 112 LED0)) + (net 97 LED0)) (pad 98 smd roundrect (at 10.6625 -3.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 109 LED1)) + (net 94 LED1)) (pad 97 smd roundrect (at 10.6625 -3.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 108 LED2)) + (net 93 LED2)) (pad 96 smd roundrect (at 10.6625 -2.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 106 LED3)) + (net 91 LED3)) (pad 95 smd roundrect (at 10.6625 -2.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 103 LED4)) + (net 88 LED4)) (pad 94 smd roundrect (at 10.6625 -1.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 61 "Net-(U1-Pad94)")) (pad 93 smd roundrect (at 10.6625 -1.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 60 "Net-(U1-Pad93)")) (pad 92 smd roundrect (at 10.6625 -0.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 101 +1V2)) + (net 86 +1V2)) (pad 91 smd roundrect (at 10.6625 -0.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 120 PIO1_09)) + (net 105 PIO1_09)) (pad 90 smd roundrect (at 10.6625 0.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 119 PIO1_08)) + (net 104 PIO1_08)) (pad 89 smd roundrect (at 10.6625 0.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (pad 88 smd roundrect (at 10.6625 1.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 118 PIO1_07)) + (net 103 PIO1_07)) (pad 87 smd roundrect (at 10.6625 1.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 117 PIO1_06)) + (net 102 PIO1_06)) (pad 86 smd roundrect (at 10.6625 2.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (pad 85 smd roundrect (at 10.6625 2.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) @@ -847,13 +957,13 @@ (pad 82 smd roundrect (at 10.6625 4.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 56 "Net-(U1-Pad82)")) (pad 81 smd roundrect (at 10.6625 4.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 116 PIO1_05)) + (net 101 PIO1_05)) (pad 80 smd roundrect (at 10.6625 5.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 115 PIO1_04)) + (net 100 PIO1_04)) (pad 79 smd roundrect (at 10.6625 5.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 114 PIO1_03)) + (net 99 PIO1_03)) (pad 78 smd roundrect (at 10.6625 6.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 113 PIO1_02)) + (net 98 PIO1_02)) (pad 77 smd roundrect (at 10.6625 6.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 55 "Net-(U1-Pad77)")) (pad 76 smd roundrect (at 10.6625 7.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) @@ -865,21 +975,21 @@ (pad 73 smd roundrect (at 10.6625 8.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 51 "Net-(U1-Pad73)")) (pad 72 smd roundrect (at 8.75 10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (pad 71 smd roundrect (at 8.25 10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 94 iCE_SS_B)) + (net 79 iCE_SS_B)) (pad 70 smd roundrect (at 7.75 10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 93 iCE_SCK)) + (net 78 iCE_SCK)) (pad 69 smd roundrect (at 7.25 10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (pad 68 smd roundrect (at 6.75 10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 92 iCE_MISO)) + (net 77 iCE_MISO)) (pad 67 smd roundrect (at 6.25 10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 91 iCE_MOSI)) + (net 76 iCE_MOSI)) (pad 66 smd roundrect (at 5.75 10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 90 iCE_CREST)) + (net 75 iCE_CREST)) (pad 65 smd roundrect (at 5.25 10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 89 iCE_CDONE)) + (net 74 iCE_CDONE)) (pad 64 smd roundrect (at 4.75 10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 50 "Net-(U1-Pad64)")) (pad 63 smd roundrect (at 4.25 10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) @@ -895,7 +1005,7 @@ (pad 58 smd roundrect (at 1.75 10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 45 "Net-(U1-Pad58)")) (pad 57 smd roundrect (at 1.25 10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (pad 56 smd roundrect (at 0.75 10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 44 "Net-(U1-Pad56)")) (pad 55 smd roundrect (at 0.25 10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) @@ -907,7 +1017,7 @@ (pad 52 smd roundrect (at -1.25 10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 40 "Net-(U1-Pad52)")) (pad 51 smd roundrect (at -1.75 10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 101 +1V2)) + (net 86 +1V2)) (pad 50 smd roundrect (at -2.25 10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 39 "Net-(U1-Pad50)")) (pad 49 smd roundrect (at -2.75 10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) @@ -917,7 +1027,7 @@ (pad 47 smd roundrect (at -3.75 10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 36 "Net-(U1-Pad47)")) (pad 46 smd roundrect (at -4.25 10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (pad 45 smd roundrect (at -4.75 10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 35 "Net-(U1-Pad45)")) (pad 44 smd roundrect (at -5.25 10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) @@ -937,7 +1047,7 @@ (pad 37 smd roundrect (at -8.75 10.6625) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 27 "Net-(U1-Pad37)")) (pad 36 smd roundrect (at -10.6625 8.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 102 "Net-(C26-Pad1)")) + (net 87 "Net-(C26-Pad1)")) (pad 35 smd roundrect (at -10.6625 8.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (pad 34 smd roundrect (at -10.6625 7.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) @@ -949,13 +1059,13 @@ (pad 31 smd roundrect (at -10.6625 6.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 23 "Net-(U1-Pad31)")) (pad 30 smd roundrect (at -10.6625 5.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (pad 29 smd roundrect (at -10.6625 5.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 22 "Net-(U1-Pad29)")) (pad 28 smd roundrect (at -10.6625 4.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 21 "Net-(U1-Pad28)")) (pad 27 smd roundrect (at -10.6625 4.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 101 +1V2)) + (net 86 +1V2)) (pad 26 smd roundrect (at -10.6625 3.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 20 "Net-(U1-Pad26)")) (pad 25 smd roundrect (at -10.6625 3.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) @@ -967,7 +1077,7 @@ (pad 22 smd roundrect (at -10.6625 1.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 16 "Net-(U1-Pad22)")) (pad 21 smd roundrect (at -10.6625 1.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 88 12MHz)) + (net 73 12MHz)) (pad 20 smd roundrect (at -10.6625 0.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 "Net-(U1-Pad20)")) (pad 19 smd roundrect (at -10.6625 0.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) @@ -991,13 +1101,13 @@ (pad 10 smd roundrect (at -10.6625 -4.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 7 "Net-(U1-Pad10)")) (pad 9 smd roundrect (at -10.6625 -4.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 148 RS232_Rx_TTL)) + (net 117 RS232_Rx_TTL)) (pad 8 smd roundrect (at -10.6625 -5.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 147 RS232_Tx_TTL)) + (net 116 RS232_Tx_TTL)) (pad 7 smd roundrect (at -10.6625 -5.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 6 "Net-(U1-Pad7)")) (pad 6 smd roundrect (at -10.6625 -6.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (pad 5 smd roundrect (at -10.6625 -6.75) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (pad 4 smd roundrect (at -10.6625 -7.25) (size 1.475 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) @@ -1015,33 +1125,33 @@ ) ) - (module Capacitor_SMD:C_0402_1005Metric (layer B.Cu) (tedit 5E2DED12) (tstamp 5E499076) - (at 86.5 58.5) + (module Capacitor_SMD:C_0402_1005Metric (layer F.Cu) (tedit 6012B4AD) (tstamp 5E499076) + (at 89.1 56.3) (descr "Capacitor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") (tags capacitor) (path /5E26453B) (attr smd) - (fp_text reference C19 (at 0 1.17) (layer B.SilkS) - (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + (fp_text reference C19 (at 0 -1.17) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value 0.1uF (at 0 -1.17) (layer B.Fab) - (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + (fp_text value 0.1uF (at 0 1.17) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text user %R (at 0 0) (layer B.Fab) - (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror)) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 0.25 0.25) (thickness 0.04))) ) - (fp_line (start 0.93 -0.47) (end -0.93 -0.47) (layer B.CrtYd) (width 0.05)) - (fp_line (start 0.93 0.47) (end 0.93 -0.47) (layer B.CrtYd) (width 0.05)) - (fp_line (start -0.93 0.47) (end 0.93 0.47) (layer B.CrtYd) (width 0.05)) - (fp_line (start -0.93 -0.47) (end -0.93 0.47) (layer B.CrtYd) (width 0.05)) - (fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.1)) - (fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.1)) - (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.1)) - (fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.1)) - (pad 2 smd roundrect (at 0.485 0) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) + (fp_line (start 0.93 0.47) (end -0.93 0.47) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.93 -0.47) (end 0.93 0.47) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.93 -0.47) (end 0.93 -0.47) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.93 0.47) (end -0.93 -0.47) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.5 0.25) (end -0.5 0.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.5 -0.25) (end 0.5 0.25) (layer F.Fab) (width 0.1)) + (fp_line (start -0.5 -0.25) (end 0.5 -0.25) (layer F.Fab) (width 0.1)) + (fp_line (start -0.5 0.25) (end -0.5 -0.25) (layer F.Fab) (width 0.1)) + (pad 2 smd roundrect (at 0.485 0) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) - (pad 1 smd roundrect (at -0.485 0) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 101 +1V2)) + (pad 1 smd roundrect (at -0.485 0) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 86 +1V2)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1073,9 +1183,9 @@ (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror)) ) (pad 1 smd roundrect (at -0.485 0 180) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (pad 2 smd roundrect (at 0.485 0 180) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 156 "Net-(C31-Pad2)")) + (net 125 "Net-(C31-Pad2)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1107,7 +1217,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 102 "Net-(C26-Pad1)")) + (net 87 "Net-(C26-Pad1)")) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl @@ -1141,9 +1251,9 @@ (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.1)) (fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.485 0 180) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 156 "Net-(C31-Pad2)")) + (net 125 "Net-(C31-Pad2)")) (pad 1 smd roundrect (at -0.485 0 180) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 154 "Net-(C32-Pad1)")) + (net 123 "Net-(C32-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1175,9 +1285,9 @@ (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror)) ) (pad 1 smd roundrect (at -0.485 0) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 152 "Net-(R21-Pad1)")) + (net 121 "Net-(R21-Pad1)")) (pad 2 smd roundrect (at 0.485 0) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1209,9 +1319,9 @@ (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.1)) (fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.485 0) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (pad 1 smd roundrect (at -0.485 0) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 154 "Net-(C32-Pad1)")) + (net 123 "Net-(C32-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1246,43 +1356,43 @@ (effects (font (size 0.8 0.8) (thickness 0.15))) ) (pad 1 smd rect (at -2.95 -2.925 180) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 157 "Net-(U3-Pad1)")) + (net 126 "Net-(U3-Pad1)")) (pad 2 smd rect (at -2.95 -2.275 180) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 158 "Net-(U3-Pad2)")) + (net 127 "Net-(U3-Pad2)")) (pad 3 smd rect (at -2.95 -1.625 180) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 159 "Net-(U3-Pad3)")) + (net 128 "Net-(U3-Pad3)")) (pad 4 smd rect (at -2.95 -0.975 180) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 160 "Net-(U3-Pad4)")) + (net 129 "Net-(U3-Pad4)")) (pad 5 smd rect (at -2.95 -0.325 180) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) (net 5 GND)) (pad 6 smd rect (at -2.95 0.325 180) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) (net 5 GND)) (pad 7 smd rect (at -2.95 0.975 180) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 100 "Net-(C5-Pad1)")) + (net 85 "Net-(C5-Pad1)")) (pad 8 smd rect (at -2.95 1.625 180) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 100 "Net-(C5-Pad1)")) + (net 85 "Net-(C5-Pad1)")) (pad 9 smd rect (at -2.95 2.275 180) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 99 "Net-(C5-Pad2)")) + (net 84 "Net-(C5-Pad2)")) (pad 10 smd rect (at -2.95 2.925 180) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 100 "Net-(C5-Pad1)")) + (net 85 "Net-(C5-Pad1)")) (pad 11 smd rect (at 2.95 2.925 180) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 98 +5V)) + (net 83 +5V)) (pad 12 smd rect (at 2.95 2.275 180) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 95 "Net-(R1-Pad2)")) + (net 80 "Net-(R1-Pad2)")) (pad 13 smd rect (at 2.95 1.625 180) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 98 +5V)) + (net 83 +5V)) (pad 14 smd rect (at 2.95 0.975 180) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 98 +5V)) + (net 83 +5V)) (pad 15 smd rect (at 2.95 0.325 180) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) (net 5 GND)) (pad 16 smd rect (at 2.95 -0.325 180) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) (net 5 GND)) (pad 17 smd rect (at 2.95 -0.975 180) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 161 "Net-(U3-Pad17)")) + (net 130 "Net-(U3-Pad17)")) (pad 18 smd rect (at 2.95 -1.625 180) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 162 "Net-(U3-Pad18)")) + (net 131 "Net-(U3-Pad18)")) (pad 19 smd rect (at 2.95 -2.275 180) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 163 "Net-(U3-Pad19)")) + (net 132 "Net-(U3-Pad19)")) (pad 20 smd rect (at 2.95 -2.925 180) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) (net 5 GND)) (pad 21 smd rect (at 0 0 180) (size 2.74 3.86) (layers F.Cu F.Paste F.Mask) @@ -1303,7 +1413,7 @@ (fp_text reference U2 (at 0 -3.4 270) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value "W25Q32JVSSIQ(SOIC-8_208mil)" (at 0 3.4 270) (layer F.Fab) + (fp_text value W25Q32JVSSIQ (at 0 3.4 270) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 0 2.56) (end 1.95 2.56) (layer F.SilkS) (width 0.12)) @@ -1323,21 +1433,21 @@ (effects (font (size 0.98 0.98) (thickness 0.15))) ) (pad 1 smd roundrect (at -2.475 -1.905 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 94 iCE_SS_B)) + (net 79 iCE_SS_B)) (pad 2 smd roundrect (at -2.475 -0.635 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 92 iCE_MISO)) + (net 77 iCE_MISO)) (pad 3 smd roundrect (at -2.475 0.635 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 137 "Net-(R16-Pad2)")) + (net 106 "Net-(R16-Pad2)")) (pad 4 smd roundrect (at -2.475 1.905 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (pad 5 smd roundrect (at 2.475 1.905 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 91 iCE_MOSI)) + (net 76 iCE_MOSI)) (pad 6 smd roundrect (at 2.475 0.635 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 93 iCE_SCK)) + (net 78 iCE_SCK)) (pad 7 smd roundrect (at 2.475 -0.635 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 96 "Net-(R2-Pad2)")) + (net 81 "Net-(R2-Pad2)")) (pad 8 smd roundrect (at 2.475 -1.905 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-8_3.9x4.9mm_P1.27mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1369,7 +1479,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 98 +5V)) + (net 83 +5V)) (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl @@ -1405,7 +1515,7 @@ (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (net 5 GND)) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1437,7 +1547,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror)) ) (pad 1 smd roundrect (at -0.485 0) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (pad 2 smd roundrect (at 0.485 0) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (net 5 GND)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl @@ -1471,7 +1581,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl @@ -1505,9 +1615,9 @@ (fp_line (start -0.5 -0.25) (end 0.5 -0.25) (layer F.Fab) (width 0.1)) (fp_line (start -0.5 0.25) (end -0.5 -0.25) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 99 "Net-(C5-Pad2)")) + (net 84 "Net-(C5-Pad2)")) (pad 1 smd roundrect (at -0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 100 "Net-(C5-Pad1)")) + (net 85 "Net-(C5-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1541,7 +1651,7 @@ (pad 2 smd roundrect (at 0.485 0) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (net 5 GND)) (pad 1 smd roundrect (at -0.485 0) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1575,7 +1685,7 @@ (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 100 "Net-(C5-Pad1)")) + (net 85 "Net-(C5-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1584,7 +1694,7 @@ ) (module Capacitor_SMD:C_0402_1005Metric (layer B.Cu) (tedit 5B301BBE) (tstamp 5E477C92) - (at 85.55 62.05 90) + (at 86.15 62.05 90) (descr "Capacitor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") (tags capacitor) (path /5E29A155) @@ -1607,7 +1717,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror)) ) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (net 5 GND)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl @@ -1643,7 +1753,7 @@ (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1677,7 +1787,7 @@ (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (net 5 GND)) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1711,7 +1821,7 @@ (pad 2 smd roundrect (at 0.485 0) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (net 5 GND)) (pad 1 smd roundrect (at -0.485 0) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1745,7 +1855,7 @@ (pad 2 smd roundrect (at 0.485 0) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (net 5 GND)) (pad 1 smd roundrect (at -0.485 0) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1777,7 +1887,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror)) ) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (net 5 GND)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl @@ -1811,7 +1921,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror)) ) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (net 5 GND)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl @@ -1847,7 +1957,7 @@ (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 101 +1V2)) + (net 86 +1V2)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1879,7 +1989,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 101 +1V2)) + (net 86 +1V2)) (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl @@ -1915,7 +2025,7 @@ (pad 2 smd roundrect (at 0.485 0 180) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (net 5 GND)) (pad 1 smd roundrect (at -0.485 0 180) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1947,7 +2057,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl @@ -1981,7 +2091,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror)) ) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 101 +1V2)) + (net 86 +1V2)) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (net 5 GND)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl @@ -2015,7 +2125,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl @@ -2051,7 +2161,7 @@ (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (net 5 GND)) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 101 +1V2)) + (net 86 +1V2)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2083,7 +2193,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl @@ -2117,7 +2227,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror)) ) (pad 1 smd roundrect (at -0.485 0) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 101 +1V2)) + (net 86 +1V2)) (pad 2 smd roundrect (at 0.485 0) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (net 5 GND)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl @@ -2151,7 +2261,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 102 "Net-(C26-Pad1)")) + (net 87 "Net-(C26-Pad1)")) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl @@ -2185,7 +2295,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl @@ -2221,7 +2331,7 @@ (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2255,7 +2365,7 @@ (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 101 +1V2)) + (net 86 +1V2)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2290,9 +2400,9 @@ (fp_line (start -0.5 0.25) (end -0.5 -0.25) (layer F.Fab) (width 0.1)) (fp_circle (center -1.09 0) (end -1.04 0) (layer F.SilkS) (width 0.1)) (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 112 LED0)) + (net 97 LED0)) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 104 "Net-(D1-Pad1)")) + (net 89 "Net-(D1-Pad1)")) (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2327,9 +2437,9 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 105 "Net-(D2-Pad1)")) + (net 90 "Net-(D2-Pad1)")) (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 109 LED1)) + (net 94 LED1)) (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2364,9 +2474,9 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 107 "Net-(D3-Pad1)")) + (net 92 "Net-(D3-Pad1)")) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 108 LED2)) + (net 93 LED2)) (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2401,9 +2511,9 @@ (fp_line (start -0.5 0.25) (end -0.5 -0.25) (layer F.Fab) (width 0.1)) (fp_circle (center -1.09 0) (end -1.04 0) (layer F.SilkS) (width 0.1)) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 106 LED3)) + (net 91 LED3)) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 110 "Net-(D4-Pad1)")) + (net 95 "Net-(D4-Pad1)")) (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2438,9 +2548,9 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 111 "Net-(D5-Pad1)")) + (net 96 "Net-(D5-Pad1)")) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 103 LED4)) + (net 88 LED4)) (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2472,9 +2582,9 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 98 +5V)) + (net 83 +5V)) (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 95 "Net-(R1-Pad2)")) + (net 80 "Net-(R1-Pad2)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2506,9 +2616,9 @@ (fp_line (start -0.5 -0.25) (end 0.5 -0.25) (layer F.Fab) (width 0.1)) (fp_line (start -0.5 0.25) (end -0.5 -0.25) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 96 "Net-(R2-Pad2)")) + (net 81 "Net-(R2-Pad2)")) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2542,7 +2652,7 @@ (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 100 "Net-(C5-Pad1)")) + (net 85 "Net-(C5-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2574,9 +2684,9 @@ (fp_line (start -0.5 -0.25) (end 0.5 -0.25) (layer F.Fab) (width 0.1)) (fp_line (start -0.5 0.25) (end -0.5 -0.25) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 100 "Net-(C5-Pad1)")) + (net 85 "Net-(C5-Pad1)")) (pad 1 smd roundrect (at -0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 101 +1V2)) + (net 86 +1V2)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2608,7 +2718,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 111 "Net-(D5-Pad1)")) + (net 96 "Net-(D5-Pad1)")) (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl @@ -2644,7 +2754,7 @@ (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 110 "Net-(D4-Pad1)")) + (net 95 "Net-(D4-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2676,7 +2786,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 107 "Net-(D3-Pad1)")) + (net 92 "Net-(D3-Pad1)")) (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl @@ -2712,7 +2822,7 @@ (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 105 "Net-(D2-Pad1)")) + (net 90 "Net-(D2-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2744,7 +2854,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 104 "Net-(D1-Pad1)")) + (net 89 "Net-(D1-Pad1)")) (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 GND)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl @@ -2778,9 +2888,9 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 94 iCE_SS_B)) + (net 79 iCE_SS_B)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2812,9 +2922,9 @@ (fp_line (start -0.5 -0.25) (end 0.5 -0.25) (layer F.Fab) (width 0.1)) (fp_line (start -0.5 0.25) (end -0.5 -0.25) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.485 0) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 137 "Net-(R16-Pad2)")) + (net 106 "Net-(R16-Pad2)")) (pad 1 smd roundrect (at -0.485 0) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2846,9 +2956,9 @@ (fp_line (start -0.5 -0.25) (end 0.5 -0.25) (layer F.Fab) (width 0.1)) (fp_line (start -0.5 0.25) (end -0.5 -0.25) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 93 iCE_SCK)) + (net 78 iCE_SCK)) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2880,9 +2990,9 @@ (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror)) ) (pad 1 smd roundrect (at -0.485 0) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (pad 2 smd roundrect (at 0.485 0) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 90 iCE_CREST)) + (net 75 iCE_CREST)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2914,9 +3024,9 @@ (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.1)) (fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.485 0) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 89 iCE_CDONE)) + (net 74 iCE_CDONE)) (pad 1 smd roundrect (at -0.485 0) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 97 +3V3)) + (net 82 +3V3)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2948,9 +3058,9 @@ (fp_line (start -0.5 -0.25) (end 0.5 -0.25) (layer F.Fab) (width 0.1)) (fp_line (start -0.5 0.25) (end -0.5 -0.25) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 102 "Net-(C26-Pad1)")) + (net 87 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