From cb019a43f55e08aa4c12573270a32213c823e1cb Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Martin=20Stensg=C3=A5rd?= <mastensg@mastensg.net>
Date: Fri, 2 May 2025 20:52:27 +0200
Subject: verilator_lib: wrap verilog module in c++ library in c++ executable

---
 verilator_lib/Makefile | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
 create mode 100644 verilator_lib/Makefile

(limited to 'verilator_lib/Makefile')

diff --git a/verilator_lib/Makefile b/verilator_lib/Makefile
new file mode 100644
index 0000000..3ea76fe
--- /dev/null
+++ b/verilator_lib/Makefile
@@ -0,0 +1,15 @@
+all: wrap
+
+check: all
+	./wrap
+
+clean:
+	rm -fr obj_dir
+
+.PHONY: all check clean
+
+obj_dir/libsim.so: mul.v sim.cc
+	verilator --cc --lib-create sim --build -j 0 -Wall mul.v sim.cc
+
+wrap: obj_dir/libsim.so
+	g++ -Iobj_dir -I/usr/share/verilator/include -I/usr/share/verilator/include/vltstd -o wrap wrap.cc obj_dir/libsim.so
-- 
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