From e4df12dbe2ffdec4b43911ef895372f8cf97972c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Martin=20Stensg=C3=A5rd?= Date: Sun, 27 Apr 2025 19:32:13 +0200 Subject: verilator_example_tracing: dump value change --- verilator_example_tracing/.gitignore | 1 + verilator_example_tracing/Makefile | 13 +++++++++++++ verilator_example_tracing/hello.v | 15 +++++++++++++++ verilator_example_tracing/sim_main.cc | 25 +++++++++++++++++++++++++ 4 files changed, 54 insertions(+) create mode 100644 verilator_example_tracing/.gitignore create mode 100644 verilator_example_tracing/Makefile create mode 100644 verilator_example_tracing/hello.v create mode 100644 verilator_example_tracing/sim_main.cc diff --git a/verilator_example_tracing/.gitignore b/verilator_example_tracing/.gitignore new file mode 100644 index 0000000..d38e9f1 --- /dev/null +++ b/verilator_example_tracing/.gitignore @@ -0,0 +1 @@ +/obj_dir diff --git a/verilator_example_tracing/Makefile b/verilator_example_tracing/Makefile new file mode 100644 index 0000000..fc2f775 --- /dev/null +++ b/verilator_example_tracing/Makefile @@ -0,0 +1,13 @@ +all: obj_dir/Vhello + +check: all + obj_dir/Vhello + +clean: + rm -fr obj_dir + +.PHONY: all check clean + +obj_dir/Vhello: hello.v sim_main.cc + verilator --cc --exe --trace --build -j 0 -Wall hello.v sim_main.cc + #verilator --cc --exe --trace --build -j 0 -Wall -O3 --x-assign fast --x-initial fast --noassert hello.v sim_main.cc diff --git a/verilator_example_tracing/hello.v b/verilator_example_tracing/hello.v new file mode 100644 index 0000000..a62addb --- /dev/null +++ b/verilator_example_tracing/hello.v @@ -0,0 +1,15 @@ +module hello(input clk); + reg [31:0] i = 0; + initial begin + $display("start"); + $dumpfile("dump.vcd"); + $dumpvars(); + end + always @(posedge clk) begin + if (i == 1000) begin + $display("stop"); + $finish; + end + i <= i+1; + end +endmodule diff --git a/verilator_example_tracing/sim_main.cc b/verilator_example_tracing/sim_main.cc new file mode 100644 index 0000000..bcb5fa7 --- /dev/null +++ b/verilator_example_tracing/sim_main.cc @@ -0,0 +1,25 @@ +#include + +#include "Vhello.h" +#include "verilated.h" + +int +main(int argc, char **argv) +{ + VerilatedContext *cp = new VerilatedContext; + cp->traceEverOn(true); + cp->commandArgs(argc, argv); + + Vhello *top = new Vhello{cp}; + top->clk = 0; + + while (!cp->gotFinish()) { + cp->timeInc(1); + + top->clk = !top->clk; + top->eval(); + } + top->final(); + VL_PRINTF("[%" PRId64 "]\n", cp->time()); + fprintf(stderr, "it finished.\n"); +} -- cgit v1.2.3